1. Field of the Invention
The present invention relates to a semiconductor memory device.
2. Description of the Related Art
It is known that at a time of program operation of a semiconductor memory device, for instance, a NOR flash memory, cell write characteristics vary depending on temperatures (see, e.g. Jpn. Pat. Appln. KOKAI Publication No. 2002-170391). For example, on a low temperature side, the variation of threshold values is large, and so the cell write speed increases. In the prior art, however, the control for applying a gate voltage and a drain voltage is made constant in accordance with the condition of high temperatures at which the write speed is low, regardless of ambient temperatures. Consequently, there is a tendency that over-program occurs on the low temperature side on which the cell write speed at the time of the program operation increases.
Furthermore, when multi-value program is executed, it is necessary to finely control a threshold distribution of cells, and so over-program is more impermissible. It may be thinkable to set the write condition in accordance with the standard on the low temperature side on which the write speed is high. However, if the write condition is set in accordance with the standard on the low temperature side on which the write speed is high, the number of times of repetition of writes increases at high temperatures, leading to an increase in write time.
Thus, in order to avoid an increase in write time, it is necessary to vary the write voltage (gate voltage or drain voltage) or to vary the time of application of write voltage, in accordance with the variation in cell write characteristics on the low temperature side and high temperature side.